FIG. 29 shows a circuit configuration diagram showing a multilevel power conversion device in a patent document 1. By setting a phase voltage reference point to a terminal 0, controlling direct current voltage sources DCC1 and DCC2 to 2E, and controlling flying capacitors FC1 and FC2 to E, it is possible to output a phase voltage of five levels of 2E, E, 0, −E, and −2E from output terminals U, V, and W.
Besides, in FIG. 29, maximum voltages applied to switching elements Su1 to Su8, Sv1 to Sv8, and Sw1 to Sw8, and diode elements Su9 to Su12, Sv9 to Sv12, and Sw9 to Sw12 in a steady state are E. For equalizing these maximum applying voltages of all the switching elements and the diode elements, Su6b and Su8 are connected in series to each other. This is also applied to the switching elements Su1 and Su5b, Sv6b and Sv8, Sv7 and Sv5b, Sw6b and Sw8, Sw7 and Sw5b, Su9 and Su10, Su11 and Su12, Sv9 and Sv10, Sv11 and Sv12, Sw9 and Sw10, and Sw11 and Sw12.
Moreover, there is proposed a multilevel power conversion device shown in FIG. 30. In the circuits shown in FIG. 29 and FIG. 30, used direct current voltage sources DCC1 and DCC2, and flying capacitors FC1 and FC2 are common to the three phases. With this, the number of the capacitors are decreased, and the size of the device is decreased.